The present invention relates to a semiconductor device such as a U groove type power semiconductor (called UMOS), and more specifically to a device structure providing an improved withstanding ability against breakdown due to surge voltage as well as a low on resistance.
One conventional example of the UMOS structure is disclosed in a Japanese Patent Provisional Publication No. 63-173371. FIG. 9 shows the sectional structure of this conventional example. In this example, an N.sup.+ buried layer 13 is formed in an upper surface of a P type substrate 12, and buried under an N.sup.- type withstand layer 14. An N.sup.+ drain lead region 19 extends deep from the topside semiconductor surface to the N.sup.+ buried layer 13, and thereby connects a topside drain electrode 29 with the buried layer 13. Gate polysilicon 24 is filled in a U groove formed in the top side surface and covered with a gate oxide film. An N.sup.+ source region 17 surrounds the polysilicon gate portion 24. The withstand region 14 serves as a drain region. Gate and source electrodes 25 and 26 are formed above the topside surface of the substrate.
In this structure, the withstand region 14 is separated from other withstand regions in the same substrate by junction isolation, and each isolated withstand region is used for one driver. Therefore, a plurality drivers can be readily formed in the same substrate by forming the buried layer 13, the drain lead region 19 and the drain electrode 29 independently.
However, this conventional example is silent about the lateral layout of the drain and source regions. Besides, this conventional device is guardless against a surge applied to the drain. When a positive surge is applied to the drain lead region 19, the electric field becomes maximum just under the gate polysilicon 24, and tends to damage the gate insulating film at the bottom of the gate polysilicon groove. In this case, the dielectric breakdown is a field breakdown, not a breakdown by power. Therefore, the momentary application of excessive field can cause damage. The problem is made worse, as compared with Si, by the use of material, such as SiC, having a high breakdown field for regions in which circuit components are formed, the problem is